This application relates to the operation of re-programmable non-volatile memory systems such as semiconductor flash memory that can store more than one bit per cell by writing multiple states, and more specifically, to using fewer than all such states, and using different states in different modes in an adaptive manner.
Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, and retains its stored data even after power is turned off. Also, unlike ROM (read only memory), flash memory is rewritable similar to a disk storage device. In spite of the higher cost, flash memory is increasingly being used in mass storage applications.
Flash EEPROM is similar to EEPROM (electrically erasable and programmable read-only memory) in that it is a non-volatile memory that can be erased and have new data written or “programmed” into their memory cells. Both utilize a floating (unconnected) conductive gate, in a field effect transistor structure, positioned over a channel region in a semiconductor substrate, between source and drain regions. A control gate is then provided over the floating gate. The threshold voltage characteristic of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, for a given level of charge on the floating gate, there is a corresponding voltage (threshold) that must be applied to the control gate before the transistor is turned “on” to permit conduction between its source and drain regions. Flash memory such as Flash EEPROM allows entire blocks of memory cells to be erased at the same time.
The floating gate can hold a range of charges and therefore can be programmed to any threshold voltage level within a threshold voltage window. The size of the threshold voltage window is delimited by the minimum and maximum threshold levels of the device, which in turn correspond to the range of the charges that can be programmed onto the floating gate. The threshold window generally depends on the memory device's characteristics, operating conditions and history. Each distinct, resolvable threshold voltage range within the window may, in principle, be used to designate a definite memory state of the cell.
In some memory systems, a memory cell is operated with two threshold voltage ranges representing two different memory states to store one bit per cell. Such memory systems may be referred to as Single Level Cell (SLC) memory systems. In other memory systems, a memory cell is operated with three or more threshold voltage ranges representing three or more different memory states to store more than one bit per cell (e.g. four threshold voltage ranges representing four different memory states to store two bits per cell). Such memory systems may be referred to as Multi Level Cell (MLC) memory systems. In some cases, a memory system, or a portion of a memory system, that is designed for MLC operation may be configured for SLC operation.
When an MLC memory, or a portion of an MLC memory, is reconfigured for SLC operation, it is desirable to provide good data retention and to avoid problems of overprogramming over the lifetime of the memory.